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A Practical Survey on Static Task Scheduling Optimization Approaches for Heterogeneous Architectures

Jonas Hollmann, Matthias Lüders, Jakob Arndt, Ioannis Kyriakopoulos, Holger Blume

Research output: Chapter in book/report/conference proceedingContribution to book/anthologyResearchpeer review

Abstract

The complexity of software increases constantly, even in embedded real-time and safety-critical systems. This ever-increasing computational demand causes more complex application-specific accelerators to get integrated into modern computational systems, causing a shift towards heterogeneous architectures. In many safety-critical real-time applications, the workload to be executed is known beforehand, allowing the developer to determine a static scheduling of the workload upfront. This allows the developer to validate safety constraints fully, a task that is often not feasible using dynamic scheduling. Generally, programming heterogeneous processors quickly becomes an almost impossible challenge for software developers. As such, numerous approaches for automatically generating static schedules have been proposed over the years. These heuristic approaches use simplified models of the target platform by ignoring concepts like memory locality or processor core clustering, as well as a simplified graph representation of the software in exchange for lower computational complexity. However, we have yet to see a practical survey of existing approaches, especially in the context of embedded real-time and safety-critical systems. Thus, we map existing heuristic approaches for the automatic generation of an approximate optimal static task scheduling to real hardware using a generic approach. In doing so the effects of the simplification during the modeling process, as well as the efficiency of the underlying heuristic are assessed by benchmarking the results of such scheduling optimization algorithms applied to algorithms of various complexity such as the Fast Fourier Transform and sparse matrix multiplication on several heterogeneous target architectures. Finally, we discuss the capabilities of existing approaches and their applicability for modern real-time critical embedded systems.
Original languageEnglish
Title of host publicationEuro-Par 2024
Subtitle of host publicationParallel Processing Workshops - Euro-Par 2024 International Workshops, Proceedings
EditorsSilvina Caino-Lores, Demetris Zeinalipour, Thaleia Dimitra Doudali, David E. Singh, Gracia Ester Martín Garzón, Leonel Sousa, Diego Andrade, Tommaso Cucinotta, Donato D'Ambrosio, Patrick Diehl, Manuel F. Dolz, Admela Jukan, Raffaele Montella, Matteo Nardelli, Marta Garcia-Gasulla, Sarah Neuwirth
Pages425–437
Number of pages13
VolumeConference proceedings
ISBN (Electronic)978-3-031-90200-0
DOIs
Publication statusPublished - 11 Jun 2025

Publication series

NameLecture Notes in Computer Science
Volume15385 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Keywords

  • Heterogeneous safety-critical embedded systems
  • List scheduling
  • Multicore
  • Task scheduling

ASJC Scopus subject areas

  • Theoretical Computer Science
  • General Computer Science

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