Abstract
Different models exist describing the current transport in polycrystalline Si/SiO x /crystalline Si junctions. Besides tunneling through thin oxides, transport through pinholes is discussed. We investigate the influence of annealing temperature on the structural properties of polycrystalline Si/SiO x /crystalline Si interfaces and analyze the formation and evolution of holes by high resolution transmission electron microscopy in comparison to electrical results. We prove the existence of pinholes in samples with good electrical properties in agreement with the pinhole model.
| Original language | English |
|---|---|
| Title of host publication | 2017 IEEE 44th Photovoltaic Specialist Conference, PVSC 2017 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 963-965 |
| Number of pages | 3 |
| ISBN (Electronic) | 9781509056057 |
| DOIs | |
| Publication status | Published - 2017 |
| Event | 44th IEEE Photovoltaic Specialist Conference, PVSC 2017 - Washington, United States Duration: 25 Jun 2017 → 30 Jun 2017 |
Conference
| Conference | 44th IEEE Photovoltaic Specialist Conference, PVSC 2017 |
|---|---|
| Country/Territory | United States |
| City | Washington |
| Period | 25 Jun 2017 → 30 Jun 2017 |
UN Sustainable Development Goals (SDGs)
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- Junction formation
- Passivating contacts
- Pinholes
- Polysilicon
- Silicon
- Silicon oxide
ASJC Scopus subject areas
- Renewable Energy, Sustainability and the Environment
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials
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